Memad3 Logo
המימד השלישי גיוס והשמה

FPGA Design Team Leader

תיאור

FPGA Design Team Leader

דרישות התפקיד


At least BSc in Electrical Engineering

At least 5 years of experience with large FPGA development on Altera or Xilinx devices

Hands on with lab FPGA debug methodologies, such as ChipScope or SignalTap

Background in communication algorithms

Preferably - experience in team management

Self-learning and problem-solving skills

 

כישורים נדרשים